hi_sparse_bitset/Cargo.toml at main · tower120/hi_sparse_bitset · GitHub

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[package]
name = "hi_sparse_bitset"
authors = ["Andrey Didukh <tower120@gmail.com>"]
license = "MIT OR Apache-2.0"
version = "0.7.3"
edition = "2021"
repository = "https://github.com/tower120/hi_sparse_bitset"
keywords = ["hierarchical", "sparse", "bitset", "bitmap", "container"]
categories = ["data-structures"]
description = "Hierarchical sparse bitset. Incredibly high performance. Compact memory usage."
exclude = ["/doc", "/.github"]

[features]
default = ["simd"]
# simd bitblocks support (128,256 bit configs)
simd = ["dep:wide"]
# serde support.
serde = ["dep:serde", "dep:base64", "dep:arrayvec", "wide/serde"]

[dependencies]
wide = { version = "0.7.28", optional = true }
serde = { version = "1.0", features = ["serde_derive"], optional = true }
arrayvec = { version = "0.7", optional = true }
base64 = { version = "0.22", optional = true }

[dev-dependencies]
anyhow = "1"
tempfile = "3"
serde_json = "1.0"
bincode = { version = "2.0", features = ["serde"] }
rand = "0.8"
itertools = "0.11"
criterion = "0.5.1"
cfg-if = "1"
# for benchmarks
hibitset = "0.6.4"
roaring = "0.10.2"

[lints.rust.unexpected_cfgs]
level = "warn"
check-cfg = [
    'cfg(hisparsebitset_test_NoCache)',
    'cfg(hisparsebitset_test_FixedCache)',
    'cfg(hisparsebitset_test_DynamicCache)',

    'cfg(hisparsebitset_test_64)',
    'cfg(hisparsebitset_test_128)',
    'cfg(hisparsebitset_test_256)',

    'cfg(hisparsebitset_test_bitset)',
]

[package.metadata.docs.rs]
all-features = true
rustdoc-args = ["--cfg", "docsrs"]

[[bench]]
name = "iteration_bench"
path = "benches/iteration.rs"
harness = false

[[bench]]
name = "intersection_bench"
path = "benches/intersection.rs"
harness = false

[[bench]]
name = "union_bench"
path = "benches/union.rs"
harness = false

[[bench]]
name = "insert_bench"
path = "benches/insert.rs"
harness = false

[[bench]]
name = "deserialize"
path = "benches/deserialize.rs"
harness = false