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199 changes: 199 additions & 0 deletions config/m4sme_e/bli_cntx_init_m4sme_e.c
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/*

BLIS
An object-based framework for developing high-performance BLAS-like
libraries.

Copyright (C) 2014, The University of Texas at Austin

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name(s) of the copyright holder(s) nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

*/

#include "blis.h"

void bli_cntx_init_m4sme_e( cntx_t* cntx )
{
blksz_t blkszs[ BLIS_NUM_BLKSZS ];

// Set default kernel blocksizes and functions.
bli_cntx_init_m4sme_e_ref( cntx );

// -------------------------------------------------------------------------
#if 0
// Update the context with optimized native gemm micro-kernels.
bli_cntx_set_ukrs
(
cntx,

// level-3
BLIS_GEMM_UKR, BLIS_FLOAT, bli_sgemm_armsme_int_2SVLx2SVL,
BLIS_GEMM_UKR, BLIS_DOUBLE, bli_dgemm_armsme_int_4SVLx2SVL,
BLIS_PACKM_KER, BLIS_FLOAT, bli_spackm_armsme_int_2SVLx2SVL,
BLIS_PACKM_KER, BLIS_DOUBLE, bli_dpackm_armsme_int_4SVLx2SVL,
BLIS_VA_END
);

// Update the context with storage preferences.
bli_cntx_set_ukr_prefs
(
cntx,

// level-3
BLIS_GEMM_UKR_ROW_PREF, BLIS_FLOAT, FALSE,
BLIS_GEMM_UKR_ROW_PREF, BLIS_DOUBLE, FALSE,

BLIS_VA_END
);

// Initialize level-3 blocksize objects with architecture-specific values.
// s d c z
bli_blksz_init_easy( &blkszs[ BLIS_MR ], 32, 32, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_NR ], 32, 16, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_MC ], 192, 608, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_KC ], 2112, 1120, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_NC ], 10240, 3072, -1, -1 );
#endif

#if 1
// Update the context with optimized native gemm micro-kernels.
bli_cntx_set_ukrs
(
cntx,

// level-3
BLIS_GEMM_UKR, BLIS_FLOAT, bli_sgemm_armsme_int_SVLx4SVL,
BLIS_GEMM_UKR, BLIS_DOUBLE, bli_dgemm_armsme_int_SVLx8SVL,
BLIS_PACKM_KER, BLIS_FLOAT, bli_spackm_armsme_int_SVLx4SVL,
BLIS_PACKM_KER, BLIS_DOUBLE, bli_dpackm_armsme_int_SVLx8SVL,
BLIS_VA_END
);

// Update the context with storage preferences.
bli_cntx_set_ukr_prefs
(
cntx,

// level-3
BLIS_GEMM_UKR_ROW_PREF, BLIS_FLOAT, TRUE,
BLIS_GEMM_UKR_ROW_PREF, BLIS_DOUBLE, TRUE,

BLIS_VA_END
);

// Initialize level-3 blocksize objects with architecture-specific values.
// s d c z
bli_blksz_init_easy( &blkszs[ BLIS_MR ], 16, 8, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_NR ], 64, 64, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_MC ], 768, 512, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_KC ], 1472, 1024, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_NC ], 10240, 3072, -1, -1 );
#endif

#if 0
// Update the context with optimized native gemm micro-kernels.
bli_cntx_set_ukrs
(
cntx,

// level-3
BLIS_GEMM_UKR, BLIS_FLOAT, bli_sgemm_armsme_int_4SVLxSVL,
BLIS_GEMM_UKR, BLIS_DOUBLE, bli_dgemm_armsme_int_8SVLxSVL,
BLIS_PACKM_KER, BLIS_FLOAT, bli_spackm_armsme_int_SVLx4SVL,
BLIS_PACKM_KER, BLIS_DOUBLE, bli_dpackm_armsme_int_SVLx8SVL,
BLIS_VA_END
);

// Update the context with storage preferences.
bli_cntx_set_ukr_prefs
(
cntx,

// level-3
BLIS_GEMM_UKR_ROW_PREF, BLIS_FLOAT, FALSE,
BLIS_GEMM_UKR_ROW_PREF, BLIS_DOUBLE, FALSE,

BLIS_VA_END
);

// Initialize level-3 blocksize objects with architecture-specific values.
// s d c z
bli_blksz_init_easy( &blkszs[ BLIS_MR ], 64, 64, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_NR ], 16, 8, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_MC ], 640, 512, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_KC ], 1024, 1024, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_NC ], 10240, 3072, -1, -1 );
#endif
#if 0
// Update the context with optimized native gemm micro-kernels.
bli_cntx_set_ukrs
(
cntx,

// level-3
BLIS_GEMM_UKR, BLIS_FLOAT, bli_sgemm_armsme_int_2SVLx2SVL,
BLIS_GEMM_UKR, BLIS_DOUBLE, bli_dgemm_armsme_int_2SVLx4SVL,
BLIS_PACKM_KER, BLIS_FLOAT, bli_spackm_armsme_int_2SVLx2SVL,
BLIS_PACKM_KER, BLIS_DOUBLE, bli_dpackm_armsme_int_4SVLx2SVL,
BLIS_VA_END
);

// Update the context with storage preferences.
bli_cntx_set_ukr_prefs
(
cntx,

// level-3
BLIS_GEMM_UKR_ROW_PREF, BLIS_FLOAT, TRUE,
BLIS_GEMM_UKR_ROW_PREF, BLIS_DOUBLE, TRUE,

BLIS_VA_END
);

// Initialize level-3 blocksize objects with architecture-specific values.
// s d c z
bli_blksz_init_easy( &blkszs[ BLIS_MR ], 32, 16, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_NR ], 32, 32, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_MC ], 192, 608, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_KC ], 2112, 1120, -1, -1 );
bli_blksz_init_easy( &blkszs[ BLIS_NC ], 10240, 3072, -1, -1 );
#endif

// Update the context with the current architecture's register and cache
// blocksizes (and multiples) for native execution.
bli_cntx_set_blkszs
(
cntx,

// level-3
BLIS_NC, &blkszs[ BLIS_NC ], BLIS_NR,
BLIS_KC, &blkszs[ BLIS_KC ], BLIS_KR,
BLIS_MC, &blkszs[ BLIS_MC ], BLIS_MR,
BLIS_NR, &blkszs[ BLIS_NR ], BLIS_NR,
BLIS_MR, &blkszs[ BLIS_MR ], BLIS_MR,

BLIS_VA_END
);
}
46 changes: 46 additions & 0 deletions config/m4sme_e/bli_family_m4sme_e.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,46 @@
/*

BLIS
An object-based framework for developing high-performance BLAS-like
libraries.

Copyright (C) 2014, The University of Texas at Austin

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name(s) of the copyright holder(s) nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

*/

//#ifndef BLIS_FAMILY_H
//#define BLIS_FAMILY_H


// -- MEMORY ALLOCATION --------------------------------------------------------

#define BLIS_SIMD_ALIGN_SIZE 64

#define BLIS_SIMD_MAX_SIZE 256
#define BLIS_SIMD_MAX_NUM_REGISTERS 32


70 changes: 70 additions & 0 deletions config/m4sme_e/bli_kernel_defs_m4sme_e.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,70 @@
/*

BLIS
An object-based framework for developing high-performance BLAS-like
libraries.

Copyright (C) 2022, The University of Texas at Austin

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name(s) of the copyright holder(s) nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

*/

//#ifndef BLIS_KERNEL_DEFS_H
//#define BLIS_KERNEL_DEFS_H


// -- REGISTER BLOCK SIZES (FOR REFERENCE KERNELS) ----------------------------
#if 0
#define BLIS_MR_s 32
#define BLIS_MR_d 32

#define BLIS_NR_s 32
#define BLIS_NR_d 16
#endif

#if 1
#define BLIS_MR_s 16
#define BLIS_MR_d 8

#define BLIS_NR_s 64
#define BLIS_NR_d 64
#endif

#if 0
#define BLIS_MR_s 64
#define BLIS_MR_d 64

#define BLIS_NR_s 16
#define BLIS_NR_d 8
#endif

#if 0
#define BLIS_MR_s 32
#define BLIS_MR_d 16

#define BLIS_NR_s 32
#define BLIS_NR_d 32
#endif
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